Researchers at the Harvard John A. Paulson School of Engineering and Applied Sciences (SEAS) and Technical University of ...

This brief presents a low-power low-jitter relaxation oscillator for on-chip low-frequency clock generation. A dynamic common-gate comparator is proposed to reduce the power, combined with a slope ...

Abstract: In this paper, a time-domain high-order ΔΣ analog-to-digital converter (ADC) using voltage-controlled gated-ring oscillator (VC-GRO) and time-domain multi-stage-noise-shaping (MASH) is ...